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LTC3809-1 No RSENSETM, Low Input Voltage, Synchronous DC/DC Controller with Output Tracking FEATURES
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DESCRIPTION
The LTC(R)3809-1 is a synchronous step-down switching regulator controller that drives external complementary power MOSFETs using few external components. The constant frequency current mode architecture with MOSFET VDS sensing eliminates the need for a current sense resistor and improves efficiency. Optional Burst Mode operation provides high efficiency operation at light loads. 100% duty cycle provides low dropout operation, extending operating time in batterypowered systems. Burst Mode is inhibited when the MODE pin is pulled low to reduce noise and RF interference. The LTC3809-1 allows either coincident or ratiometric output voltage tracking. Switching frequency is fixed at 550kHz. Fault protection is provided by an overvoltage comparator and a short-circuit current limit comparator. The LTC3809-1 is available in tiny footprint thermally enhanced DFN and 10-lead MSOP packages.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. Burst is a registered trademark of Linear Technology Corporation. No RSENSE is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 5481178, 5929620, 6580258, 6304066, 5847554, 6611131, 6498466. Other Patents pending.
Programmable Output Voltage Tracking No Current Sense Resistor Required Constant Frequency Current Mode Operation for Excellent Line and Load Transient Response Wide VIN Range: 2.75V to 9.8V Wide VOUT Range: 0.6V to VIN 0.6V 1.5% Reference Low Dropout Operation: 100% Duty Cycle Selectable Burst Mode(R)/Pulse-Skipping/Forced Continuous Operation Auxiliary Winding Regulation Internal Soft-Start Circuitry Selectable Maximum Peak Current Sense Threshold Output Overvoltage Protection Micropower Shutdown: IQ = 9A Tiny Thermally Enhanced Leadless (3mm x 3mm) DFN and 10-lead MSOP Packages
APPLICATIONS
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1- or 2-Cell Lithium-Ion Powered Devices Notebook and Palmtop Computers, PDAs Portable Instruments Distributed DC Power Systems
TYPICAL APPLICATION
High Efficiency, 550kHz Step-Down Converter
10F IPRG MODE 59k 15k 187k 470pF VFB ITH RUN GND
38091 TA01
Efficiency and Power Loss vs Load Current
100 VIN 2.75V TO 9.8V 90 EFFICIENCY (%) EFFICIENCY VIN = 3.3V VIN = 5V 80 TYPICAL POWER LOSS (VIN = 4.2V) VIN = 4.2V 100 1k POWER LOSS (mW) 10k
VIN
TG 2.2H SW BG 47F VOUT 2.5V 2A
LTC3809-1
70
10
60 FIGURE 8 CIRCUIT VOUT = 2.5V 1 10 100 1k LOAD CURRENT (mA)
1
50
0.1 10k
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38091 TA02
1
LTC3809-1 ABSOLUTE MAXIMUM RATINGS
(Note 1)
Input Supply Voltage (VIN) ........................ -0.3V to 10V RUN, TRACK/SS, MODE, IPRG Voltages ............................... -0.3V to (VIN + 0.3V) VFB, ITH Voltages ...................................... -0.3V to 2.4V SW Voltage ......................... -2V to VIN + 1V (10V Max) TG, BG Peak Output Current (<10s) ......................... 1A Operating Temperature Range (Note 2)....-40C to 85C
Storage Ambient Temperature Range DFN....................................................-65C to 125C MSOP ................................................-65C to 150C Junction Temperature (Note 3) ............................ 125C Lead Temperature (Soldering, 10 sec) MSOP Package ................................................. 300C
PIN CONFIGURATION
TOP VIEW TOP VIEW MODE TRACK/SS VFB ITH RUN 1 2 3 4 5 11 10 SW 9 VIN 8 TG 7 BG 6 IPRG MODE TRACK/SS VFB ITH RUN 1 2 3 4 5 10 9 8 7 6 SW VIN TG BG IPRG
11
DD PACKAGE 10-LEAD (3mm 3mm) PLASTIC DFN TJMAX = 125C, JA = 43C/W EXPOSED PAD (PIN 11) IS GND (MUST BE SOLDERED TO PCB)
MSE PACKAGE 10-LEAD PLASTIC MSOP TJMAX = 125C, JA = 40C/W EXPOSED PAD (PIN 11) IS GND (MUST BE SOLDERED TO PCB)
ORDER INFORMATION
LEAD FREE FINISH LTC3809EDD-1#PBF LTC3809IDD-1#PBF LTC3809EMSE-1#PBF LTC3809IMSE-1#PBF LEAD BASED FINISH LTC3809EDD-1 LTC3809IDD-1 LTC3809EMSE-1 LTC3809IMSE-1 TAPE AND REEL LTC3809EDD-1#TRPBF LTC3809IDD-1#TRPBF LTC3809EMSE-1#TRPBF LTC3809IMSE-1#TRPBF TAPE AND REEL LTC3809EDD-1#TR LTC3809IDD-1#TR LTC3809EMSE-1#TR LTC3809IMSE-1#TR PART MARKING* LBQZ LBQZ LTBQV LTBQV PART MARKING* LBQZ LBQZ LTBQV LTBQV PACKAGE DESCRIPTION 10-Lead (3mm x 3mm) Plastic DFN 10-Lead (3mm x 3mm) Plastic DFN 10-Lead Plastic MSOP 10-Lead Plastic MSOP PACKAGE DESCRIPTION 10-Lead (3mm x 3mm) Plastic DFN 10-Lead (3mm x 3mm) Plastic DFN 10-Lead Plastic MSOP 10-Lead Plastic MSOP TEMPERATURE RANGE -40C to 85C -40C to 85C -40C to 85C -40C to 85C TEMPERATURE RANGE -40C to 85C -40C to 85C -40C to 85C -40C to 85C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
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LTC3809-1 ELECTRICAL CHARACTERISTICS
PARAMETER Main Control Loops Input DC Supply Current Normal Operation Sleep Mode Shutdown UVLO Undervoltage Lockout Threshold (UVLO) Shutdown Threshold of RUN Pin Start-Up Current Source Regulated Feedback Voltage Output Voltage Line Regulation Output Voltage Load Regulation VFB Input Current Overvoltage Protect Threshold Overvoltage Protect Hysteresis Auxiliary Feedback Threshold Top Gate (TG) Drive Rise Time Top Gate (TG) Drive Fall Time Bottom Gate (BG) Drive Rise Time Bottom Gate (BG) Drive Fall Time Maximum Current Sense Voltage (VSENSE(MAX)) (VIN - SW) Soft-Start Time (Internal) Oscillator Frequency Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC3809E-1 is guaranteed to meet specified performance from 0C to 85C. Specifications over the -40C to 85C operating range are assured by design characterization, and correlation with statistical process controls. The LTC3809I-1 is guaranteed to meet specified performance over the full -40C to 85C operating temperature range. CL = 3000pF CL = 3000pF CL = 3000pF CL = 3000pF IPRG = Floating (Note 6) IPRG = 0V (Note 6) IPRG = VIN (Note 6) Time for VFB to Ramp from 0.05V to 0.55V
l l l
The l indicates specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VIN = 4.2V unless otherwise noted.
CONDITIONS (Note 4) RUN = 0V VIN = UVLO Threshold -200mV VIN Falling VIN Rising TRACK/SS = 0V (Note 5) 2.75V < VIN < 9.8V (Note 5) ITH = 0.9V (Note 5) ITH = 1.7V (Note 5) Measured at VFB 0.66 0.325
l l l
MIN
TYP
MAX
UNITS
350 105 9 9 1.95 2.15 0.8 0.65 0.591 2.25 2.45 1.1 1 0.6 0.01 0.1 -0.1 9 0.68 20 0.4 40 40 50 40 110 70 185 0.5 480 125 85 204 0.74 550
500 150 20 20 2.55 2.75 1.4 1.35 0.609 0.04 0.5 -0.5 50 0.7 0.475
A A A A V V V A V %/V % % nA V mV V ns ns ns ns
140 100 223 0.9 600
mV mV mV ms kHz
Note 3: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formula: TJ = TA + (PD * JA C/W) Note 4: Dynamic supply current is higher due to gate charge being delivered at the switching frequency. Note 5: The LTC3809-1 is tested in a feedback loop that servos ITH to a specified voltage and measures the resultant VFB voltage. Note 6: Peak current sense voltage is reduced dependent on duty cycle to a percentage of value as shown in Figure 1.
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LTC3809-1 TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency vs Load Current
100 95 90 EFFICIENCY (%) 85 80 75 70 65 60 1 MODE = VIN VIN = 5V 10 100 1k LOAD CURRENT (mA) 10k
38091 G01
TA = 25C, unless otherwise noted. Maximum Current Sense Voltage vs ITH Pin Voltage
100 80 CURRENT LIMIT (%) 60 40 20 0 -20 Burst Mode OPERATION (ITH RISING) Burst Mode OPERATION (ITH FALLING) FORCED CONTINUOUS MODE PULSE SKIPPING MODE
Efficiency vs Load Current
100 FIGURE 8 CIRCUIT 95 VIN = 5V, VOUT = 2.5V 90 EFFICIENCY (%) 85 80 75 70 65 60 55 50 1 10 100 1k LOAD CURRENT (mA) 10k
38091 G02
FIGURE 8 CIRCUIT VOUT = 3.3V
VOUT = 2.5V
VOUT = 1.2V VOUT = 1.8V
BURST MODE (MODE = VIN) FORCED CONTINUOUS (MODE = 0V)
PULSE SKIPPING (MODE = 0.6V)
0.5
1 1.5 ITH VOLTAGE (V)
2
38091 G03
Load Step (Burst Mode Operation)
VOUT 200mV/DIV AC COUPLED VOUT 200mV/DIV AC COUPLED
Load Step (Forced Continuous Mode)
VOUT 200mV/DIV AC COUPLED
Load Step (Pulse-Skipping Mode)
IL 2A/DIV
IL 2A/DIV
IL 2A/DIV
100s/DIV VIN = 3.3V VOUT = 1.8V ILOAD = 300mA TO 3A MODE = V IN FIGURE 8 CIRCUIT
38091 G04
100s/DIV VIN = 3.3V VOUT = 1.8V ILOAD = 300mA TO 3A MODE = 0V FIGURE 8 CIRCUIT
38091 G05
100s/DIV VIN = 3.3V VOUT = 1.8V ILOAD = 300mA TO 3A MODE = VFB FIGURE 8 CIRCUIT
38091 G06
Start-Up with Internal Soft-Start (TRACK/SS = VIN)
Start-Up with External Soft-Start (CSS = 10nF)
VOUT 1.8V 500mV/DIV
VOUT 1.8V 500mV/DIV
200s/DIV VIN = 4.2V RLOAD = 1 FIGURE 8 CIRCUIT
38091 G07
1ms/DIV VIN = 4.2V RLOAD = 1 FIGURE 8 CIRCUIT
38091 G08
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LTC3809-1 TYPICAL PERFORMANCE CHARACTERISTICS
Start-Up with Coincident Tracking (VOUT = 0V at 0s)
Vx 2.5V VOUT 1.8V 500mV/DIV
TA = 25C, unless otherwise noted. Start-Up with Ratiometric Tracking (VOUT = 0V at 0s)
Start-Up with Coincident Tracking (VOUT = 0.8V at 0s)
Vx 2.5V VOUT 1.8V 500mV/DIV
Vx 2.5V VOUT 1.8V 500mV/DIV
10ms/DIV VIN = 4.2V RTA = 590 RTB = 1.18k FIGURE 8 CIRCUIT
38091 G09
10ms/DIV VIN = 4.2V RTA = 590 RTB = 1.18k FIGURE 8 CIRCUIT
38091 G10
10ms/DIV VIN = 4.2V RTA = 590 RTB = 1.69k FIGURE 8 CIRCUIT
38091 G11
Regulated Feedback Voltage vs Temperature
0.606 0.604 FEEDBACK VOLTAGE (V) INPUT VOLTAGE (V) 0.602 0.600 0.598 0.596 0.594 -60 -40 -20 2.55 2.50 2.45 2.40 2.35 2.30
Undervoltage Lockout Threshold vs Temperature
1.20 VIN RISING 1.15 RUN VOLTAGE (V)
Shutdown (RUN) Threshold vs Temperature
1.10
VIN FALLING 2.25 2.20
1.05
0 20 40 60 TEMPERATURE (C)
80
100
2.15 -60 -40 -20
20 40 60 0 TEMPERATURE (C)
80
100
1.00 -60 -40 -20
20 40 60 0 TEMPERATURE (C)
80
100
38091 G012
38091 G13
38091 G14
Maximum Current Sense Threshold vs Temperature
MAXIMUM CURRENT SENSE THRESHOLD (mV) 135 IPRG = FLOAT TRACK/SS START-UP CURRENT (A) 1.04
TRACK/SS Start-Up Current vs Temperature
TRACK/SS = 0V
1.02
130
1.00
125
0.98
120
0.96
115 -60 -40 -20
20 40 60 0 TEMPERATURE (C)
80
100
0.94 -60 -40 -20
0 20 40 60 TEMPERATURE (C)
80
100
38091 G15
38091 G16
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LTC3809-1 TYPICAL PERFORMANCE CHARACTERISTICS
Oscillator Frequency vs Temperature
10 NORMALIZED FREQUENCY SHIFT (%) 8 NORMALIZED FREQUENCY (%) 6 4 2 0 -2 -4 -6 -8 -10 -60 -40 -20 0 20 40 60 TEMPERATURE (C) 80 100 5 4 SHUTDOWN CURRENT (A) 3 2 1 0 -1 -2 -3 -4 -5 2 3 4 7 8 5 6 INPUT VOLTAGE (V) 9 10
TA = 25C, unless otherwise noted. Shutdown Quiescent Current vs Input Voltage
18 16 14 12 10 8 6 4 2 0 2 3 4 8 7 6 5 INPUT VOLTAGE (V) 9 10
Oscillator Frequency vs Input Voltage
38091 G17
38091 G18
38091 G19
Sleep Current vs Input Voltage
130 120 SLEEP CURRENT (A) 110 100 90 80 70 2 3 4 TRACK/SS STARTUP CURRENT (A) 1.04
TRACK/SS Start-Up Current vs TRACK/SS Voltage
1.00
0.96
0.92
0.88
8 7 6 5 INPUT VOLTAGE (V)
0.84 9 10 0 0.1
0.2 0.3 0.4 0.5 TRACK/SS VOLTAGE (V)
0.6
0.7
38091 G20
38091 G21
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LTC3809-1 PIN FUNCTIONS
MODE (Pin 1): This pin performs two functions: 1) auxiliary winding feedback input, and 2) Burst Mode operation, pulse skipping or forced continuous mode select. To select Burst Mode operation at light loads, tie this pin to VIN. Grounding this pin selects forced continuous operation which allows the inductor current to reverse. Tying this pin to VFB selects pulse-skipping mode. Do not leave this pin floating. TRACK/SS (Pin 2): Tracking Input for the Controller or Optional External Soft-Start Input. This pin allows the start-up of VOUT to "track" the external voltage at this pin using an external resistor divider. Tying this pin to VIN allows VOUT to start up with the internal 0.74ms soft-start. An external soft-start can be programmed by connecting a capacitor between this pin and ground. Do not leave this pin floating. VFB (Pin 3): Feedback Pin. This pin receives the remotely sensed feedback voltage for the controller from an external resistor divider across the output. ITH (Pin 4): Current Threshold and Error Amplifier Compensation Point. Nominal operating range on this pin is from 0.7V to 2V. The voltage on this pin determines the threshold of the main current comparator. RUN (Pin 5): Run Control Input. Forcing this pin below 1.1V shuts down the chip. Driving this pin to VIN or releasing this pin enables the chip to start-up with the internal soft-start. IPRG (Pin 6): Three-State Pin to Select Maximum Peak Sense Voltage Threshold. This pin selects the maximum allowed voltage drop between the VIN and SW pins (i.e., the maximum allowed drop across the external P-channel MOSFET). Tie to VIN, GND or float to select 204mV, 85mV or 125mV respectively. BG (Pin 7): Bottom (NMOS) Gate Drive Output. This pin drives the gate of the external N-channel MOSFET. This pin has an output swing from PGND to VIN. TG (Pin 8): Top (PMOS) Gate Drive Output. This pin drives the gate of the external P-channel MOSFET. This pin has an output swing from PGND to VIN. VIN (Pin 9): Chip Signal Power Supply. This pin powers the entire chip, the gate drivers and serves as the positive input to the differential current comparator. SW (Pin 10): Switch Node Connection to Inductor. This pin is also the negative input to the differential current comparator and an input to the reverse current comparator. Normally this pin is connected to the drain of the external P-channel MOSFET, the drain of the external N-channel MOSFET and the inductor. GND (Exposed Pad, Pin 11): Ground connection for internal circuits, the gate drivers and the negative input to the reverse current comparator. The Exposed Pad must be soldered to the PCB ground.
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LTC3809-1 FUNCTIONAL DIAGRAM
VIN CIN 9 VIN
VOLTAGE REFERENCE
VREF 0.6V
SLOPE
6 IPRG
+
UNDERVOLTAGE LOCKOUT VIN VIN 0.7A 5 RUN t = 0.74ms INTERNAL SOFT-START VIN 0.15V UVSD SENSE+ ICMP
CLK
S Q R SWITCHING LOGIC AND BLANKING CIRCUIT GND ANTI-SHOOTTHROUGH PVIN
8
TG
MP
-
OSC
10
SW
L VOUT COUT
7
BG
MN
+ -
FCB SLEEP OV IREV BURSTDIS
+ - +
UV 0.68V RB
11
GND 1A 0.3V MUX TRK/SS
2
TRACK/SS
0.54V
MODE 1 BURST DEFEAT
-
BURSTDIS FCB
VFB 4 ITH RC
+ - + EAMP + -
VREF 0.6V TRK/SS 3 VFB
CC
RA
38091 FD
+
IREV RICMP
SW
-
GND
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LTC3809-1 OPERATION
Main Control Loop The LTC3809-1 uses a constant frequency, current mode architecture. During normal operation, the top external P-channel power MOSFET is turned on when the clock sets the RS latch, and is turned off when the current comparator (ICMP) resets the latch. The peak inductor current at which ICMP resets the RS latch is determined by the voltage on the ITH pin, which is driven by the output of the error amplifier (EAMP). The VFB pin receives the output voltage feedback signal from an external resistor divider. This feedback signal is compared to the internal 0.6V reference voltage by the EAMP. When the load current increases, it causes a slight decrease in VFB relative to the 0.6V reference, which in turn causes the ITH voltage to increase until the average inductor current matches the new load current. While the top P-channel MOSFET is off, the bottom N-channel MOSFET is turned on until either the inductor current starts to reverse, as indicated by the current reversal comparator IRCMP or , the beginning of the next cycle. Shutdown, Soft-Start and Tracking Start-Up (RUN and TRACK/SS Pins) The LTC3809-1 is shut down by pulling the RUN pin low. In shutdown, all controller functions are disabled and the chip draws only 9A. The TG output is held high (off) and the BG output low (off) in shutdown. Releasing the RUN pin allows an internal 0.7A current source to pull up the RUN pin to VIN. The controller is enabled when the RUN pin reaches 1.1V. The start-up of VOUT is based on the three different connections on the TRACK/SS pin. The start-up of VOUT is controlled by the LTC3809-1's internal soft-start when TRACK/SS is connected to VIN. During soft-start, the error amplifier EAMP compares the feedback signal VFB to the internal soft-start ramp (instead of the 0.6V reference), which rises linearly from 0V to 0.6V in about 1ms. This allows the output voltage to rise smoothly from 0V to its final value while maintaining control of the inductor current. The 1ms soft-start time can be changed by connecting the optional external soft-start capacitor CSS between the TRACK/SS and GND pins. When the controller is enabled
(Refer to Functional Diagram)
by releasing the RUN pin, the TRACK/SS pin is charged up by an internal 1A current source and rises linearly from 0V to above 0.6V. The error amplifier EAMP compares the feedback signal VFB to this ramp instead, and regulates VFB linearly from 0V to 0.6V. When the voltage on the TRACK/SS pin is less than the 0.6V internal reference, the LTC3809-1 regulates the VFB voltage to the TRACK/SS pin instead of the 0.6V reference. Therefore VOUT of the LTC3809-1 can track an external voltage VX during start-up. Typically, a resistor divider on VX is connected to the TRACK/SS pin to allow the start-up of VOUT to "track" that of VX . For coincident tracking during start-up, the regulated final value of VX should be larger than that of VOUT, and the resistor divider on VX has the same ratio as the divider on VOUT that is connected to VFB . See detailed discussions in the Run and Soft-Start/Tracking Functions in the Applications Information Section. Light Load Operation (Burst Mode Operation, Continuous Conduction or Pulse-Skipping Mode) (MODE Pin) The LTC3809-1 can be programmed for either high efficiency Burst Mode operation, forced continuous conduction mode or pulse-skipping mode at low load currents. To select Burst Mode operation, tie the MODE pin to VIN. To select forced continuous operation, tie the MODE pin to a DC voltage below 0.4V (e.g., GND). Tying the MODE pin to a DC voltage above 0.4V and below 1.2V (e.g., VFB) enables pulse-skipping mode. The 0.4V threshold between forced continuous operation and pulse-skipping mode can be used in secondary winding regulation as described in the Auxiliary Winding Control Using the MODE Pin discussion in the Applications Information section. When the LTC3809-1 is in Burst Mode operation, the peak current in the inductor is set to approximately one-fourth of the maximum sense voltage even though the voltage on the ITH pin indicates a lower value. If the average inductor current is higher than the load current, the EAMP will decrease the voltage on the ITH pin. When the ITH voltage drops below 0.85V, the internal SLEEP signal goes high and the external MOSFET is turned off.
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LTC3809-1 OPERATION
(Refer to Functional Diagram)
In sleep mode, much of the internal circuitry is turned off, reducing the quiescent current that the LTC3809-1 draws. The load current is supplied by the output capacitor. As the output voltage decreases, the EAMP increases the ITH voltage. When the ITH voltage reaches 0.925V, the SLEEP signal goes low and the controller resumes normal operation by turning on the external P-channel MOSFET on the next cycle of the internal oscillator. When the controller is enabled for Burst Mode or pulseskipping operation, the inductor current is not allowed to reverse. Hence, the controller operates discontinuously. The reverse current comparator RICMP senses the drain-to-source voltage of the bottom external N-channel MOSFET. This MOSFET is turned off just before the inductor current reaches zero, preventing it from going negative. In forced continuous operation, the inductor current is allowed to reverse at light loads or under large transient conditions. The peak inductor current is determined by the voltage on the ITH pin. The P-channel MOSFET is turned on every cycle (constant frequency) regardless of the ITH pin voltage. In this mode, the efficiency at light loads is lower than in Burst Mode operation. However, continuous mode has the advantages of lower output ripple and no noise at audio frequencies. When the MODE pin is set to the VFB Pin, the LTC3809-1 operates in PWM pulse-skipping mode at light loads. In this mode, the current comparator ICMP may remain tripped for several cycles and force the external P-channel MOSFET to stay off for the same number of cycles. The inductor current is not allowed to reverse (discontinuous operation). This mode, like forced continuous operation, exhibits low output ripple as well as low audible noise and reduced RF interference as compared to Burst Mode operation. However, it provides low current efficiency higher than forced continuous mode, but not nearly as
high as Burst Mode operation. During start-up or an undervoltage condition (VFB 0.54V), the LTC3809-1 operates in pulse-skipping mode (no current reversal allowed), regardless of the state of the MODE pin. Short-Circuit and Current Limit Protection The LTC3809-1 monitors the voltage drop VSC (between the GND and SW pins) across the external N-channel MOSFET with the short-circuit current limit comparator. The allowed voltage is determined by: VSC(MAX) = A * 90mV where A is a constant determined by the state of the IPRG pin. Floating the IPRG pin selects A = 1; tying IPRG to VIN selects A = 5/3; tying IPRG to GND selects A = 2/3. The inductor current limit for short-circuit protection is determined by VSC(MAX) and the on-resistance of the external N-channel MOSFET: ISC = VSC(MAX ) RDS(ON)
Once the inductor current exceeds ISC, the short current comparator will shut off the external P-channel MOSFET until the inductor current drops below ISC . Output Overvoltage Protection As further protection, the overvoltage comparator (OVP) guards against transient overshoots, as well as other more serious conditions that may overvoltage the output. When the feedback voltage on the VFB pin has risen 13.33% above the reference voltage of 0.6V, the external P-channel MOSFET is turned off and the N-channel MOSFET is turned on until the overvoltage is cleared.
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LTC3809-1 OPERATION
Dropout Operation When the input supply voltage (VIN) approaches the output voltage, the rate of change of the inductor current while the external P-channel MOSFET is on (ON cycle) decreases. This reduction means that the P-channel MOSFET will remain on for more than one oscillator cycle if the inductor current has not ramped up to the threshold set by the EAMP on the ITH pin. Further reduction in the input supply voltage will eventually cause the P-channel MOSFET to be turned on 100%; i.e., DC. The output voltage will then be determined by the input voltage minus the voltage drop across the P-channel MOSFET and the inductor. Undervoltage Lockout To prevent operation of the P-channel MOSFET below safe input voltage levels, an undervoltage lockout is incorporated in the LTC3809-1. When the input supply voltage (VIN) drops below 2.25V, the external P- and N-channel MOSFETs and all internal circuits are turned off except for the undervoltage block, which draws only a few microamperes. Peak Current Sense Voltage Selection and Slope Compensation (IPRG Pin) When the LTC3809-1 controller is operating below 20% duty cycle, the peak current sense voltage (between the VIN and SW pins) allowed across the external P-channel MOSFET is determined by: V - 0.7 V VSENSE(MAX ) = A * ITH 10
(Refer to Functional Diagram)
where A is a constant determined by the state of the IPRG pin. Floating the IPRG pin selects A = 1; tying IPRG to VIN selects A = 5/3; tying IPRG to GND selects A = 2/3. The maximum value of VITH is typically about 1.98V, so the maximum sense voltage allowed across the external P-channel MOSFET is 125mV, 85mV or 204mV for the three respective states of the IPRG pin. However, once the controller's duty cycle exceeds 20%, slope compensation begins and effectively reduces the peak sense voltage by a scale factor (SF) given by the curve in Figure 1. The peak inductor current is determined by the peak sense voltage and the on-resistance of the external P-channel MOSFET: IPK = VSENSE(MAX ) RDS(ON)
110 100 90 80 SF = I/IMAX (%) 70 60 50 40 30 20 10 0 0 10 20 30 40 50 60 70 80 90 100 DUTY CYCLE (%)
38091 F01
Figure 1. Maximum Peak Current vs Duty Cycle
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LTC3809-1 APPLICATIONS INFORMATION
The typical LTC3809-1 application circuit is shown in Figure 8. External component selection for the controller is driven by the load requirement and begins with the selection of the inductor and the power MOSFETs. Power MOSFET Selection The LTC3809-1's controller requires two external power MOSFETs: a P-channel MOSFET for the topside (main) switch and a N-channel MOSFET for the bottom (synchronous) switch. The main selection criteria for the power MOSFETs are the breakdown voltage VBR(DSS), threshold voltage VGS(TH), on-resistance RDS(ON), reverse transfer capacitance CRSS, turn-off delay tD(OFF) and the total gate charge QG. The gate drive voltage is the input supply voltage. Since the LTC3809-1 is designed for operation down to low input voltages, a sublogic level MOSFET (RDS(ON) guaranteed at VGS = 2.5V) is required for applications that work close to this voltage. When these MOSFETs are used, make sure that the input supply to the LTC3809-1 is less than the absolute maximum MOSFET VGS rating, which is typically 8V. The P-channel MOSFET's on-resistance is chosen based on the required load current. The maximum average load current IOUT(MAX) is equal to the peak inductor current minus half the peak-to-peak ripple current IRIPPLE. The LTC3809-1's current comparator monitors the drain-tosource voltage VDS of the top P-channel MOSFET, which is sensed between the VIN and SW pins. The peak inductor current is limited by the current threshold, set by the voltage on the ITH pin, of the current comparator. The voltage on the ITH pin is internally clamped, which limits the maximum current sense threshold VSENSE(MAX) to approximately 125mV when IPRG is floating (85mV when IPRG is tied low; 204mV when IPRG is tied high). The output current that the LTC3809-1 can provide is given by: IOUT(MAX ) = VSENSE(MAX ) IRIPPLE - RDS(ON) 2 where IRIPPLE is the inductor peak-to-peak ripple current (see Inductor Value Calculation). A reasonable starting point is setting ripple current IRIPPLE to be 40% of IOUT(MAX). Rearranging the above equation yields: 5 VSENSE(MAX ) RDS(ON)MAX = * for Duty Cycle < 20% 6 IOUT(MAX ) However, for operation above 20% duty cycle, slope compensation has to be taken into consideration to select the appropriate value of RDS(ON) to provide the required amount of load current: VSENSE(MAX ) 5 RDS(ON)MAX = * SF * 6 IOUT(MAX ) where SF is a scale factor whose value is obtained from the curve in Figure 1. These must be further derated to take into account the significant variation in on-resistance with temperature. The following equation is a good guide for determining the required RDS(ON)MAX at 25C (manufacturer's specification), allowing some margin for variations in the LTC3809-1 and external component values: VSENSE(MAX ) 5 RDS(ON)MAX = * 0.9 * SF * 6 IOUT(MAX ) * T The T is a normalizing term accounting for the temperature variation in on-resistance, which is typically about 0.4%/C, as shown in Figure 2. Junction-to-case temperature TJC is about 10C in most applications. For a maximum ambient temperature of 70C, using 80C ~ 1.3 in the above equation is a reasonable choice. The N-channel MOSFET's on resistance is chosen based on the short-circuit current limit (ISC). The LTC38091's short-circuit current limit comparator monitors the drain-to-source voltage VDS of the bottom N-channel MOSFET, which is sensed between the GND and SW pins.
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12
LTC3809-1 APPLICATIONS INFORMATION
2.0 1.5
1.0
VOUT VIN V -V Bottom N-Channel Duty Cycle = IN OUT VIN Top P-Channel Duty Cycle = The MOSFET power dissipations at maximum output current are: PTOP =
50 100 0 JUNCTION TEMPERATURE (C) 150
38091 F02
0.5
0 -50
VOUT 2 2 * IOUT (MAX) * T * RDS(ON) + 2 * VIN VIN * IOUT (MAX) * CRSS * f VIN - VOUT 2 * IOUT (MAX) * T * RDS(ON) VIN
Figure 2. RDS(ON) vs Temperature
PBOT =
The short-circuit current sense threshold VSC is set approximately 90mV when IPRG is floating (60mV when IPRG is tied low; 150mV when IPRG is tied high). The on-resistance of N-channel MOSFET is determined by: RDS(ON)MAX = VSC ISC(PEAK )
Both MOSFETs have I2R losses and the PTOP equation includes an additional term for transition losses, which are largest at high input voltages. The bottom MOSFET losses are greatest at high input voltage or during a short-circuit when the bottom duty cycle is 100%. The LTC3809-1 utilizes a non-overlapping, anti-shootthrough gate drive control scheme to ensure that the P- and N-channel MOSFETs are not turned on at the same time. To function properly, the control scheme requires that the MOSFETs used are intended for DC/DC switching applications. Many power MOSFETs, particularly P-channel MOSFETs, are intended to be used as static switches and therefore are slow to turn on or off. Reasonable starting criteria for selecting the P-channel MOSFET are that it must typically have a gate charge (QG) less than 25nC to 30nC (at 4.5VGS) and a turn-off delay (tD(OFF)) of less than approximately 140ns. However, due to differences in test and specification methods of various MOSFET manufacturers, and in the variations in QG and tD(OFF) with gate drive (VIN) voltage, the P-channel MOSFET ultimately should be evaluated in the actual LTC3809-1 application circuit to ensure proper operation. Shoot-through between the P-channel and N-channel MOSFETs can most easily be spotted by monitoring the input supply current. As the input supply voltage increases, if the input supply current increases dramatically, then the likely cause is shoot-through. Note that some MOSFETs
38091fc
The short-circuit current limit (ISC(PEAK)) should be larger than the IOUT(MAX) with some margin to avoid interfering with the peak current sensing loop. On the other hand, in order to prevent the MOSFETs from excessive heating and the inductor from saturation, ISC(PEAK) should be smaller than the minimum value of their current ratings. A reasonable range is: IOUT(MAX) < ISC(PEAK) < IRATING(MIN) Therefore, the on-resistance of N-channel MOSFET should be chosen within the following range: VSC IRATING(MIN) < RDS(ON) < VSC IOUT(MAX )
where VSC is 90mV, 60mV or 150mV with IPRG being floated, tied to GND or VIN respectively. The power dissipated in the MOSFET strongly depends on its respective duty cycles and load current. When the LTC3809-1 is operating in continuous mode, the duty cycles for the MOSFETs are:
13
LTC3809-1 APPLICATIONS INFORMATION
that do not work well at high input voltages (e.g., VIN > 5V) may work fine at lower voltages (e.g., 3.3V). Selecting the N-channel MOSFET is typically easier, since for a given RDS(ON), the gate charge and turn-on and turn-off delays are much smaller than for a P-channel MOSFET. Inductor Value Calculation Given the desired input and output voltages, the inductor value and operating frequency, fOSC , directly determine the inductor's peak-to-peak ripple current: IRIPPLE = VOUT VIN - VOUT * VIN fOSC * L The corresponding average current depends on the amount of ripple current. Lower inductor values (higher IRIPPLE) will reduce the load current at which Burst Mode operation begins. The ripple current is normally set so that the inductor current is continuous during the burst periods. Therefore, IRIPPLE IBURST(PEAK) This implies a minimum inductance of: L MIN VIN - VOUT V * OUT fOSC * IBURST(PEAK ) VIN
Lower ripple current reduces core losses in the inductor, ESR losses in the output capacitors and output voltage ripple. Thus, highest efficiency operation is obtained at low frequency with a small ripple current. Achieving this, however, requires a large inductor. A reasonable starting point is to choose a ripple current that is about 40% of IOUT(MAX). Note that the largest ripple current occurs at the highest input voltage. To guarantee that ripple current does not exceed a specified maximum, the inductor should be chosen according to: L VIN - VOUT VOUT * fOSC * IRIPPLE VIN
A smaller value than LMIN could be used in the circuit, although the inductor current will not be continuous during burst periods, which will result in slightly lower efficiency. In general, though, it is a good idea to keep IRIPPLE comparable to IBURST(PEAK). Inductor Core Selection Once the value of L is known, the type of inductor must be selected. Actual core loss is independent of core size for a fixed inductor value, but is very dependent on the inductance selected. As inductance increases, core losses go down. Unfortunately, increased inductance requires more turns of wire and therefore copper losses will increase. Ferrite designs have very low core losses and are preferred at high switching frequencies, so design goals can concentrate on copper loss and preventing saturation. Ferrite core material saturates "hard", which means that inductance collapses abruptly when the peak design current is exceeded. Core saturation results in an abrupt increase in inductor ripple current and consequent output voltage ripple. Do not allow the core to saturate!
Burst Mode Operation Considerations The choice of RDS(ON) and inductor value also determines the load current at which the LTC3809-1 enters Burst Mode operation. When bursting, the controller clamps the peak inductor current to approximately: 1 VSENSE(MAX ) IBURST(PEAK ) = * 4 RDS(ON)
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14
LTC3809-1 APPLICATIONS INFORMATION
Different core materials and shapes will change the size/ current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy materials are small and don't radiate much energy, but generally cost more than powdered iron core inductors with similar characteristics. The choice of which style inductor to use mainly depends on the price vs size requirements and any radiated field/EMI requirements. New designs for surface mount inductors are available from Coiltronics, Coilcraft, Toko and Sumida. Schottky Diode Selection (Optional) The schottky diode D in Figure 9 conducts current during the dead time between the conduction of the power MOSFETs. This prevents the body diode of the bottom N-channel MOSFET from turning on and storing charge during the dead time, which could cost as much as 1% in efficiency. A 1A Schottky diode is generally a good size for most LTC3809-1 applications, since it conducts a relatively small average current. Larger diode results in additional transition losses due to its larger junction capacitance. This diode may be omitted if the efficiency loss can be tolerated. CIN and COUT Selection In continuous mode, the source current of the P-channel MOSFET is a square wave of duty cycle (VOUT /VIN). To prevent large voltage transients, a low ESR input capacitor sized for the maximum RMS current must be used. The maximum RMS capacitor current is given by: CIN Re quiredIRMS IMAX * VOUT * ( VIN - VOUT ) VIN
1/ 2
This formula has a maximum value at VIN = 2VOUT, where IRMS = IOUT /2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Note that capacitor manufacturer's ripple current ratings are often based on 2000 hours of life. This makes it advisable to further derate the capacitor or to choose a capacitor rated at a higher temperature than required. Several capacitors may be paralleled to meet the size or height requirements in the design. Due to the high operating frequency of the LTC3809-1, ceramic capacitors can also be used for CIN. Always consult the manufacturer if there is any question. The selection of COUT is driven by the effective series resistance (ESR). Typically, once the ESR requirement is satisfied, the capacitance is adequate for filtering. The output ripple (VOUT) is approximated by: 1 VOUT IRIPPLE * ESR + 8 * f * COUT where f is the operating frequency, COUT is the output capacitance and IRIPPLE is the ripple current in the inductor. The output ripple is highest at maximum input voltage since IRIPPLE increase with input voltage. Setting Output Voltage The LTC3809-1 output voltage is set by an external feedback resistor divider carefully placed across the output, as shown in Figure 3. The regulated output voltage is determined by: R VOUT = 0.6 V * 1 + B RA
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15
LTC3809-1 APPLICATIONS INFORMATION
For most applications, a 59k resistor is suggested for RA. In applications where minimizing the quiescent current is critical, RA should be made bigger to limit the feedback divider current. If RB then results in very high impedance, it may be beneficial to bypass RB with a 50pF to 100pF capacitor CFF.
VOUT RB CFF
LTC3809-1 VFB
Once the controller is enabled, the start-up of VOUT is controlled by the state of the TRACK/SS pin. If the TRACK/SS pin is connected to VIN, the start-up of VOUT is controlled by internal soft-start, which slowly ramps the positive reference to the error amplifier from 0V to 0.6V, allowing VOUT to rise smoothly from 0V to its final value. The default internal soft-start time is around 0.74ms. The soft-start time can be changed by placing a capacitor between the TRACK/SS pin and GND. In this case, the soft-start time will be approximately: tSS = CSS * 600mV 1A
RA
38091 F03
Figure 3. Setting Output Voltage
where 1A is an internal current source which is always on. When the voltage on the TRACK/SS pin is less than the internal 0.6V reference, the LTC3809-1 regulates the VFB voltage to the TRACK/SS pin voltage instead of 0.6V. Therefore the start-up of VOUT can ratiometrically track an external voltage VX, according to a ratio set by a resistor divider at TRACK/SS pin (Figure 5a). The ratiometric relation between VOUT and VX is (Figure 5c): VOUT R TA R A + RB = * VX R A R TA + R TB
VOUT VX LTC3809-1
Run and Soft-Start/Tracking Functions The LTC3809-1 has a low power shutdown mode which is controlled by the RUN pin. Pulling the RUN pin below 1.1V puts the LTC3809-1 into a low quiescent current shutdown mode (IQ = 9A). Releasing the RUN pin, an internal 0.7A (at VIN = 4.2V) current source will pull the RUN pin up to VIN, which enables the controller. The RUN pin can be driven directly from logic as showed in Figure 4.
3.3V OR 5V LTC3809-1 RUN LTC3809-1 RUN
38091 F04
RB RA
RTB RTA
VFB TRACK/SS
38091 F5a
Figure 4. RUN Pin Interfacing
Figure 5a. Using the TRACK/SS Pin to Track VX
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16
LTC3809-1 APPLICATIONS INFORMATION
VX OUTPUT VOLTAGE OUTPUT VOLTAGE VX
VOUT
VOUT
38091 F05b,c
TIME
TIME
(5b) Coincident Tracking
(5c) Ratiometric Tracking
Figure 5b and 5c. Two Different Modes of Output Voltage Tracking
For coincident tracking (VOUT = VX during start-up), RTA = RA, RTB = RB VX should always be greater than VOUT when using the tracking function of TRACK/SS pin. The internal current source (1A), which is for external soft-start, will cause a tracking error at VOUT. For example, if a 59k resistor is chosen for RTA, the RTA current will be about 10A (600mV/59k). In this case, the 1A internal current source will cause about 10% (1A/10A * 100%) tracking error, which is about 60mV (600mV * 10%) referred to VFB. This is acceptable for most applications. If a better tracking accuracy is required, the value of RTA should be reduced. Table 1 summarizes the different states in which the TRACK/SS can be used.
Table 1. The States of the TRACK/SS Pin
TRACK/SS Pin Capacitor CSS VIN Resistor Divider FREQUENCY External Soft-Start Internal Soft-Start VOUT Tracking an External Voltage VX
Auxiliary Winding Control Using the MODE Pin The MODE pin can be used as an auxiliary feedback to provide a means of regulating a flyback winding output. When this pin drops below its ground-referenced 0.4V threshold, continuous mode operation is forced. During continuous mode, current flows continuously in the transformer primary side. The auxiliary winding draws current only when the bottom synchronous N-channel MOSFET is on. When primary load currents are low and/ or the VIN /VOUT ratio is close to unity, the synchronous MOSFET may not be on for a sufficient amount of time to transfer power from the output capacitor to the auxiliary load. Forced continuous operation will support an auxiliary winding as long as there is a sufficient synchronous MOSFET duty factor. The MODE input pin removes the requirement that power must be drawn from the transformer primary side in order to extract power from the auxiliary winding. With the loop in continuous mode, the auxiliary output may nominally be loaded without regard to the primary output load.
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17
LTC3809-1 APPLICATIONS INFORMATION
The auxiliary output voltage VAUX is normally set, as shown in Figure 6, by the turns ratio N of the transformer: VAUX = (N + 1) * VOUT
VAUX 1F VOUT NORMALIZED VOLTAGE OR CURRENT (%)
In a hard short (VOUT = 0V), the top P-channel MOSFET is turned off and kept off until the short-circuit condition is cleared. In this case, there is no current path from input supply (VIN) to either VOUT or GND, which prevents excessive MOSFET and inductor heating.
105 100 95 90 85 80 75 2.0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 INPUT VOLTAGE (V)
38091 F07
VIN LTC3809-1 R6 MODE R5 BG TG SW L1 1:N
+
VREF
+
COUT
38091 F06
MAXIMUM SENSE VOLTAGE
Figure 6. Auxiliary Output Loop Connection
However, if the controller goes into pulse-skipping operation and halts switching due to a light primary load current, then VAUX will droop. An external resistor divider from VAUX to the MODE sets a minimum voltage VAUX(MIN): R6 VAUX(MIN) = 0.4 V * 1 + R5 If VAUX drops below this value, the MODE voltage forces temporary continuous switching operation until VAUX is again above its minimum. Fault Condition: Short-Circuit and Current Limit If the LTC3809-1's load current exceeds the short-circuit current limit (ISC), which is set by the short-circuit sense threshold (VSC) and the on resistance (RDS(ON)) of bottom N-channel MOSFET, the top P-channel MOSFET is turned off and will not be turned on at the next clock cycle unless the load current decreases below ISC. In this case, the controller's switching frequency is decreased and the output is regulated by short-circuit (current limit) protection.
Figure 7. Line Regulation of VREF and Maximum Sense Voltage
Low Supply Voltage Although the LTC3809-1 can function down to below 2.4V, the maximum allowable output current is reduced as VIN decreases below 3V. Figure 7 shows the amount of change as the supply is reduced down to 2.4V. Also shown is the effect on VREF. Minimum On-Time Considerations Minimum on-time, tON(MIN) is the smallest amount of time that the LTC3809-1 is capable of turning the top P-channel MOSFET on. It is determined by internal timing delays and the gate charge required to turn on the top MOSFET. Low duty cycle and high frequency applications may approach the minimum on-time limit and care should be taken to ensure that: tON(MIN) < VOUT fOSC * VIN
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18
LTC3809-1 APPLICATIONS INFORMATION
If the duty cycle falls below what can be accommodated by the minimum on-time, the LTC3809-1 will begin to skip cycles (unless forced continuous mode is selected). The output voltage will continue to be regulated, but the ripple current and ripple voltage will increase. The minimum ontime for the LTC3809-1 is typically about 210ns. However, as the peak sense voltage (IL(PEAK) * RDS(ON)) decreases, the minimum on-time gradually increases up to about 260ns. This is of particular concern in forced continuous applications with low ripple current at light loads. If forced continuous mode is selected and the duty cycle falls below the minimum on time requirement, the output will be regulated by overvoltage protection. Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting efficiency and which change would produce the most improvement. Efficiency can be expressed as: Efficiency = 100% - (L1 + L2 + L3 + ...) where L1, L2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, four main sources usually account for most of the losses in LTC3809-1 circuits: 1) LTC3809-1 DC bias current, 2) MOSFET gate-charge current, 3) I2R losses and 4) transition losses. 1) The VIN (pin) current is the DC supply current, given in the Electrical Characteristics, which excludes MOSFET driver currents. VIN current results in a small loss that increases with VIN. 2) MOSFET gate-charge current results from switching the gate capacitance of the power MOSFET. Each time a MOSFET gate is switched from low to high to low again, a packet of charge dQ moves from VIN to ground. The resulting dQ/dt is a current out of VIN, which is typically much larger than the DC supply current. In continuous mode, IGATECHG = f * QP. 3) I2R losses are calculated from the DC resistances of the MOSFETs, inductor and/or sense resistor. In continuous mode, the average output current flows through L but is "chopped" between the top P-channel MOSFET and the bottom N-channel MOSFET. The MOSFET RDS(ON) multiplied by duty cycle can be summed with the resistance of L to obtain I2R losses. 4) Transition losses apply to the external MOSFET and increase with higher operating frequencies and input voltages. Transition losses can be estimated from: Transition Loss = 2 * VIN2 * IO(MAX) * CRSS * f Other losses, including CIN and COUT ESR dissipative losses and inductor core losses, generally account for less than 2% total additional loss. Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to (ILOAD) * (ESR), where ESR is the effective series resistance of COUT. ILOAD also begins to charge or discharge COUT generating a feedback error signal used by the regulator to return VOUT to its steady-state value. During this recovery time, VOUT can be monitored for overshoot or ringing that would indicate a stability problem. OPTI-LOOP compensation allows the transient response to be optimized over a wide range of output capacitance and ESR values. The ITH series RC-CC filter (see Functional Diagram) sets the dominant pole-zero loop compensation. The ITH external components showed in the figure on the first page of this data sheet will provide adequate compensation for most applications. The values can be modified slightly (from 0.2 to 5 times their suggested values) to optimize transient response once the final PC layout is done and the particular output capacitor type and value have been determined. The output capacitor needs to be decided upon because the various types and values determine the loop feedback factor gain and phase. An output current
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19
LTC3809-1 APPLICATIONS INFORMATION
pulse of 20% to 100% of full load current having a rise time of 1s to 10s will produce output voltage and ITH pin waveforms that will give a sense of the overall loop stability. The gain of the loop will be increased by increasing RC and the bandwidth of the loop will be increased by decreasing CC. The output voltage settling behavior is related to the stability of the closed-loop system and will demonstrate the actual overall supply performance. For a detailed explanation of optimizing the compensation components, including a review of control loop theory, refer to Application Note 76. A second, more severe transient is caused by switching in loads with large (>1F) supply bypass capacitors. The discharged bypass capacitors are effectively put in parallel with COUT, causing a rapid drop in VOUT. No regulator can deliver enough current to prevent this problem if the load switch resistance is low and it is driven quickly. The only solution is to limit the rise time of the switch drive so that the load rise time is limited to approximately (25) * (CLOAD). Thus a 10F capacitor would be require a 250s rise time, limiting the charging current to about 200mA. Design Example As a design example, assume VIN will be operating from a maximum of 4.2V down to a minimum of 2.75V (powered by a single lithium-ion battery). Load current requirement is a maximum of 2A, but most of the time it will be in a standby mode requiring only 2mA. Efficiency at both low and high load currents is important. Burst Mode operation at light loads is desired. Output voltage is 1.8V. The IPRG pin will be left floating, so the maximum current sense threshold VSENSE(MAX) is approximately 125mV. Maximum Duty Cycle = From Figure 1, SF = 82%. VSENSE(MAX ) 5 RDS(ON)MAX = * 0.9 * SF * = 0.032 6 IOUT(MAX ) * T VOUT = 65.5% VIN(MIN) A 0.032 P-channel MOSFET in Si7540DP is close to this value. The N-channel MOSFET in Si7540DP has 0.017 RDS(ON). The short-circuit current is: ISC = 90mV = 5.3A 0.017
So the inductor current rating should be higher than 5.3A. The LTC3809-1 operates at a frequency of 550kHz. For continuous Burst Mode operation with 600mA IRIPPLE, the required minimum inductor value is: LMIN = 1.8 V 1.8 V * 1- = 1.88H 550kHz * 600mA 2.75V
A 6A 2.2H inductor works well for this application. CIN will require an RMS current rating of at least 1A at temperature. A COUT with 0.1 ESR will cause approximately 60mV output ripple. PC Board Layout Checklist When laying out the printed circuit board, use the following checklist to ensure proper operation of the LTC3809-1. * The power loop (input capacitor, MOSFET, inductor, output capacitor) should be as small as possible and isolated as much as possible from LTC3809-1. * Put the feedback resistors close to the VFB pins. The ITH compensation components should also be very close to the LTC3809-1. * The current sense traces should be Kelvin connections right at the P-channel MOSFET source and drain. * Keeping the switch node (SW) and the gate driver nodes (TG, BG) away from the small-signal components, especially the feedback resistors, and ITH compensation components.
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LTC3809-1 TYPICAL APPLICATIONS
VIN 2.75V TO 8V 1 10F MODE VIN 6 CITH 220pF RITH 15k IPRG LTC3809EDD-1 ITH TRACK/SS SW TG 9 8 MP Si7540DP L 1.5H VOUT 2.5V (5A AT 5VIN)
4
10
2 187k
BG
7
MN Si7540DP
3 59k
VFB
GND 11
RUN
5
COUT 150F
+
100pF
L: VISHAY IHLP-2525CZ-01 COUT: SANYO 4TPB150MC
38091 F08
Figure 8. 550kHz, Synchronous DC/DC Converter with Internal Soft-Start
VIN 2.75V TO 8V 10F 1 MODE VIN 6 470pF IPRG TG LTC3809EDD-1 ITH TRACK/SS SW 9 8 MP Si3447BDV L 1.5H
15k
4
10
10nF 2 118k BG 7 MN Si3460DV COUT 22F x2
VOUT 1.8V 2A
3 59k
VFB
GND 11
RUN
5 D (OPT)
100pF
L: VISHAY IHLP-2525CZ-01 D: ON SEMI MBRM120LT3 (OPTIONAL)
38091 F09
Figure 9. 550kHz, Synchronous DC/DC Converter with External Soft-Start, Ceramic Output Capacitor
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LTC3809-1 TYPICAL APPLICATIONS
Synchronous DC/DC Converter with Output Tracking
1 VIN 2.75V TO 8V MODE VIN 6 220pF IPRG LTC3809EDD-1 ITH SW TG 9 8 MP Si7540DP L 1.5H VOUT 1.8V (5A AT 5VIN) 10F
15k
4
10
1.18k Vx 590 118k
2
TRACK/SS
BG
7
MN Si7540DP COUT 150F
+
3 59k
VFB
GND 11
RUN
5
100pF
L: VISHAY IHLP-2525CZ-01 COUT: SANYO 4TPB150MC VOUT < Vx
38091 TA03
PACKAGE DESCRIPTION
DD Package 10-Lead Plastic DFN (3mm x 3mm)
(Reference LTC DWG # 05-08-1698)
R = 0.115 TYP 6 0.675 0.05
0.38 10
0.10
3.50
0.05 1.65 0.05 2.15 0.05 (2 SIDES) PACKAGE OUTLINE 0.25 0.05 0.50 BSC 2.38 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2). CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS PIN 1 TOP MARK (SEE NOTE 6)
3.00 0.10 (4 SIDES)
1.65 0.10 (2 SIDES)
(DD10) DFN 1103
5 0.200 REF 0.75 0.05 2.38 0.10 (2 SIDES)
1 0.25 0.05 0.50 BSC
0.00 - 0.05
BOTTOM VIEW--EXPOSED PAD
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
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LTC3809-1 PACKAGE DESCRIPTION
MSE Package 10-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1664 Rev C)
BOTTOM VIEW OF EXPOSED PAD OPTION
2.794 (.110
0.102 .004)
0.889 (.035
0.127 .005)
1
2.06 0.102 (.081 .004) 1.83 0.102 (.072 .004)
0.29 REF
5.23 (.206) MIN
2.083 (.082
0.102 3.20 - 3.45 .004) (.126 - .136)
0.05 REF DETAIL "B" CORNER TAIL IS PART OF DETAIL "B" THE LEADFRAME FEATURE. FOR REFERENCE ONLY NO MEASUREMENT PURPOSE 0.497 0.076 (.0196 .003) REF
10
0.50 0.305 0.038 (.0197) (.0120 .0015) BSC TYP RECOMMENDED SOLDER PAD LAYOUT
3.00 0.102 (.118 .004) (NOTE 3) 10 9 8 7 6
4.90 0.152 (.193 .006) 0.254 (.010) GAUGE PLANE 0.53 0.152 (.021 .006) DETAIL "A" 0.18 (.007) SEATING PLANE 1.10 (.043) MAX DETAIL "A" 0 - 6 TYP 12345
3.00 0.102 (.118 .004) (NOTE 4)
0.86 (.034) REF
0.17 - 0.27 (.007 - .011) TYP
NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.50 (.0197) BSC
0.1016 (.004
0.0508 .002)
MSOP (MSE) 0908 REV C
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LTC3809-1 RELATED PARTS
PART NUMBER LTC1628/LTC3728 LTC1735 LTC1773 LTC1778 LTC1872 LTC3411 LTC3412 LTC3416 LTC3418 LTC3701 LTC3708 DESCRIPTION Dual High Efficiency, 2-Phase Synchronous Step Down Controllers High Efficiency Synchronous Step-Down Controller Synchronous Step-Down Controller No RSENSE , Synchronous Step-Down Controller Constant Frequency Current Mode Step-Up Controller 1.25A (IOUT), 4MHz, Synchronous Step-Down DC/DC Converter 2.5A (IOUT), 4MHz, Synchronous Step-Down DC/DC Converter 4A, 4MHz, Monolithic Synchronous Step-Down Regulator 8A, 4MHz, Monolithic Synchronous Regulator 2-Phase, Low Input Voltage Dual Step-Down DC/DC Controller 2-Phase, No RSENSE , Dual Synchronous Controller with Output Tracking COMMENTS Constant Frequency, Standby, 5V and 3.3V LDOs, VIN to 36V, Burst Mode Operation, 16-Pin Narrow SSOP Fault Protection, , 3.5V VIN 36V 2.65V VIN 8.5V, IOUT Up to 4A, 10-Lead MSOP Current Mode Operation Without Sense Resistor, Fast Transient Response, 4V VIN 36V 2.5V VIN 9.8V, SOT-23 Package, 550kHz 95% Efficiency, VIN: 2.5V to 5.5V, VOUT = 0.8V, IQ = 60A, ISD = <1A, MS Package 95% Efficiency, VIN: 2.5V to 5.5V, VOUT = 0.8V, IQ = 60A, ISD = <1A, TSSOP-16E Package Tracking Input to Provide Easy Supply Sequencing, 2.25V VIN 5.5V, 20-Lead TSSOP Package Tracking Input to Provide Easy Supply Sequencing, 2.25V VIN 5.5V, QFN Package 2.5V VIN 9.8V, 550kHz, PGOOD, PLL, 16-Lead SSOP Constant On-Time Dual Controller, VIN Up to 36V, Very Low Duty Cycle Operation, 5mm x 5mm QFN Package 2.75V VIN 9.8V, 0.6V VOUT VIN , 4mm x 4mm QFN Integrated Spread Spectrum for 20dB Lower "Noise," 2.75V VIN 9.8V 2.75V VIN 9.8V, 0.6V VOUT VIN , 4mm x 4mm QFN
LTC3736/LTC3736-2 2-Phase, No RSENSE , Dual Synchronous Controller with Output Tracking LTC3736-1 LTC3737 LTC3772 LTC3776 Low EMI, 2-Phase, No RSENSE , Dual Synchronous Controller with Output Tracking 2-Phase, No RSENSE , Dual DC/DC Controller with Output Tracking
Micropower, No RSENSE , Constant Frequency Step-Down Controller 40A No-Load IQ, Non-Synchronous, 2.75V VIN 9.8V, 550kHz, 3mm x 2mm DFN or 8-Lead TSOT-23 Packages. Dual, 2-Phase, No RSENSE , Synchronous Controller for DDR/QDR Memory Termination Provides VDDQ and VTT with One IC, 2.75V VIN 9.8V, Adjustable Constant Frequency with PLL Up to 850kHz, Spread Spectrum Operation, 4mm x 4mm QFN and 24-Lead SSOP Packages
LTC3808 LTC3809
No RSENSE , Low EMI, Synchronous Controller with Output Tracking 2.75V VIN 9.8V, 4mm x 3mm DFN, Spread Spectrum for 20dB Lower Peak Noise No RSENSE , Low EMI, Synchronous DC/DC Controller 2.75V VIN 9.8V, 3mm x 3mm DFN and 10-Lead MSOPE Packages, Spread Spectrum for 20dB Lower Peak Noise
PolyPhase is a trademark of Linear Technology Corporation.
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24 Linear Technology Corporation
(408) 432-1900 FAX: (408) 434-0507
LT 1108 REV C * PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2005

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